February 5, 2013 - At the Linley Data Center Conference held in San Jose earlier this month, we had a chance to meeting the Ryan Baxter of Micron to discuss their new NVDIMM module that is targeted at enterprise servers. To bring higher reliability to the enterprise marketplace, the NVDIMM product looks like an RDIMM or LRDIMM to the system, but brings the ability to provide a failsafe storage in the event of power failure until the system is restored.
The DDR3 memory interface for the Ivybridge class processors, has DRAM on board that sits on the memory bus, and the on-DIMM controller (From Gigatech) hides the loading of the NAND Flash from behind buffers so they are transparent to the system. The module has a supercap or battery for supplying power for the backup write during power failures. The system can backup in two modes, full coverage of the DRAM at power loss, or periodic snapshots on a timed interval in addition to the power loss image.
Micron NVDIMM with Battery Backup
The product is initially available as s 4G/8G module with 4G of DDR3 DRAM and 8G of NAND Flash. These will utilize the pin 167 Address line of the DDR3 spec for power save control to the DIMM. The use of this signal may require a system BIOS update to conform to the activation of the pin as in the Ivybridge class systems. As the application is currently power loss write, the NAND is not heavily over-provisioned and has only moderate levels of wear leveling.
The next product will be an 8G/16G product that will be 8G of DRAM and 16G of Flash. This will be more of a hybrid product, that is going to have a higher write capacity and be over-provisioned accordingly. As a DDR3 product, the entire memory is still being written as a single image at power loss. The module tri-states the bus at the power loss, so the backup write to Flash is clean and does not get interrupted by the bus. Later DDR4 versions may have page or block based write, depending on customer demand.
One of the challenges for these products in the high density server application space, is where to place the backup power. The design has the battery/supercap on a pigtail connection from the DIMM that allows for standard pcking density of the modules, and placement of the backup power in the drive bay of the server. As these evolve, the plan is for the DDR4 version to be an alternative to PCIe SSD caching solutions.
The DDR3 NVDIMM is currently sampling in the 4G/8G configuration. The 8G/16G is scheduled for sampling in Q2 ‘13 and the DDR4 hybrid version in Q2 of ‘14.